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 STM809, STM810 STM811, STM812
Reset circuit
Features

Precision monitoring of 3 V, 3.3 V, and 5 V supply voltages Two output configurations - Push-pull RST output (STM809/811) - Push-pull RST output (STM810/812) 140 ms reset pulse width (min) Low supply current - 6 A (typ) Guaranteed RST/RST assertion down to VCC = 1.0 V Operating temperature: -40 C to 85 C (industrial grade) Lead-free, small SOT23 and SOT143 package
SOT143-4 (W1) SOT23-3 (WX)

Table 1.
Device summary
Active-low reset Active-high reset Manual reset input Package SOT23-3 SOT23-3 SOT143-4 SOT143-4
STM809 STM810 STM811 STM812
January 2010
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www.st.com 1
Contents
STM809/810/811/812
Contents
1 2 Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2.1 2.2 2.3 2.4 Reset output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Push-button reset input (STM811/812) . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Negative-going VCC transients . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Valid RST output down to VCC = 0 V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
3 4 5 6 7 8
Typical operating characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 DC and AC parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Part numbering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
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List of tables
List of tables
Table 1. Table 2. Table 3. Table 4. Table 5. Table 6. Table 7. Table 8. Table 9. Table 10. Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Signal names . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Operating and AC measurement conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 DC and AC characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 SOT23-3 - 3-lead small outline transistor package mechanical data. . . . . . . . . . . . . . . . . 16 SOT143-4 - 4-lead small outline transistor package mechanical data. . . . . . . . . . . . . . . . 17 Ordering information scheme . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Marking description. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
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List of figures
STM809/810/811/812
List of figures
Figure 1. Figure 2. Figure 3. Figure 4. Figure 5. Figure 6. Figure 7. Figure 8. Figure 9. Figure 10. Figure 11. Figure 12. Figure 13. Figure 14. Figure 15. Figure 16. Logic diagram (STM809/810) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Logic diagram (STM811/812) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 SOT23-3 connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 SOT143-4 connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Hardware hookup . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Supply current vs. temperature, L/M/R/S/T (no load) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Power-down reset delay vs. temperature - VOD = VTH - VCC (L/M) . . . . . . . . . . . . . . . . . . . 9 Power-down reset delay vs. temperature - VOD = VTH - VCC (R/S/T) . . . . . . . . . . . . . . . . 10 Power-up trec vs. temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Normalized reset threshold vs. temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Max transient duration NOT causing reset pulse vs. reset comparator overdrive . . . . . . . 11 AC testing input/output waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 MR timing waveform . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 SOT23-3 - 3-lead small outline transistor package outline . . . . . . . . . . . . . . . . . . . . . . . . 16 SOT143-4 - 4-lead small outline transistor package outline . . . . . . . . . . . . . . . . . . . . . . . 17
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STM809/810/811/812
Description
1
Description
The STM809/810/811/812 microprocessor reset circuits are low-power supervisory devices used to monitor power supplies. They perform a single function: asserting a reset signal whenever the VCC supply voltage drops below a preset value and keeping it asserted until VCC has risen above the preset threshold for a minimum period of time (trec). The STM811/812 also provide a push-button reset input (MR). Figure 1. Logic diagram (STM809/810)
VCC
STM809/810
RST (RST)
(1)
VSS
1. For STM810
AI07832
Figure 2.
Logic diagram (STM811/812)
VCC
MR
STM811/812
RST (RST)(1)
VSS
1. For STM812
AI07831
Table 2.
VSS RST RST(1) VCC MR(2)
Signal names
Ground Active-low reset output Active-high reset output Supply voltage Manual reset input
1. STM810/812 only 2. STM811/812 only
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Description Figure 3. SOT23-3 connections
STM809/810/811/812
VSS RST (RST)
1 2
3
VCC
(For STM810)
Figure 4. SOT143-4 connections
AI07833
VSS RST (RST)
1 2
4 3
VCC MR
(For STM812)
AI07834
Figure 5.
Block diagram
VCC
VRST
COMPARE trec Generator RST(2)
MR(1)
DEBOUNCE
AI07835
1. STM811/812 only 2. RST for STM810/812
Figure 6.
Hardware hookup
VCC VCC STM8 09/810/ 811/812 MR(2) RST VSS
(1)
VCC MCU RESET Input VSS
Push-button RESET
AI07836
1. STM809/811 only (RST for STM810/812) 2. STM811/812 only
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STM809/810/811/812
Operation
2
2.1
Operation
Reset output
The STM809/810/811/812 microprocessor reset circuit asserts a reset signal to the MCU whenever VCC goes below the reset threshold (VRST), or when the push-button reset input (MR) is taken low (see Figure 14 on page 13). RST (active high for STM810/812) is guaranteed valid down to VCC = 1 V (0 to 70C). During power-up, once VCC exceeds the reset threshold an internal timer keeps RST low for the reset time-out period, trec. After this interval, RST returns high. If VCC drops below the reset threshold, RST goes low. Each time RST is asserted, it stays low for at least the reset time-out period. Any time VCC goes below the reset threshold, the internal timer clears. The reset timer starts when VCC returns above the reset threshold. The active-low reset (RST) and active-high reset (RST) both source and sink current.
2.2
Push-button reset input (STM811/812)
A logic low on MR asserts RST. RST remains asserted while MR is low, and for trec after it returns high. The MR input has an internal 20 k pull-up resistor, allowing it to be left open if not used. This input can be driven with TTL/CMOS-logic levels or with open-drain/collector outputs. Connect a normally open push-button switch from MR to GND to create a manual reset function; external debounce circuitry is not required. If the device is used in a noisy environment, connect a 0.1 F capacitor from MR to GND to provide additional noise immunity.
2.3
Negative-going VCC transients
The STM809/810/811/812 are relatively immune to negative-going VCC transients (glitches). Figure 12 on page 11 shows typical transient duration versus reset comparator overdrive (for which the STM809/810/811/812 will NOT generate a reset pulse). The graph was generated using a negative pulse applied to VCC, starting at 0.5V above the actual reset threshold and ending below it by the magnitude indicated (comparator overdrive). The graph indicates the maximum pulse width a negative VCC transient can have without causing a reset pulse. As the magnitude of the transient increases (further below the threshold), the maximum allowable pulse width decreases. Any combination of duration and overdrive which lies under the curve will NOT generate a reset signal. Typically, a VCC transient that goes 100 mV below the reset threshold and lasts 20 s or less will not cause a reset pulse. A 0.1 F bypass capacitor mounted as close as possible to the VCC pin provides additional transient immunity.
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Operation
STM809/810/811/812
2.4
Valid RST output down to VCC = 0 V
When VCC falls below 1 V, the RST (STM809/811) output no longer sinks current, but becomes an open circuit. In most systems this is not a problem, as most MCUs do not operate below 1 V. However, in applications where RST output must be valid down to 0 V, a pull-down resistor may be added to hold the RST output low. This resistor must be large enough to not load the RST output, and still be small enough to pull the output to ground. A 100 k resistor is recommended.
Note:
The same situation applies for the active-high RST of the STM810/812. A 100 k pull-up resistor to VCC should be used if RST must remain valid for VCC < 1.0 V.
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Typical operating characteristics
3
Note:
Typical operating characteristics
Typical values are at TA = 25 C, VCC = 5 V for L/M versions, VCC = 3.3 V for T/S versions, and VCC = 3.0 V for R versions. Figure 7. Supply current vs. temperature, L/M/R/S/T (no load)
8.0
6.0 Supply Current (A)
4.0
1V 3V 3.6V 5.5V
2.0
0.0 -40
-20
0
20 Temperature (C)
40
60
80 AI07879
Figure 8.
Power-down reset delay vs. temperature - VOD = VTH - VCC (L/M)
140.00 120.00 Power-Down Reset Delay (s) 100.00 80.00 60.00 40.00 20.00 0.00 -40
VOD = 20mV VOD = 125mV VOD = 200mV
-20
0
20 Temperature (C)
40
60
80 AI07880
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Typical operating characteristics Figure 9.
STM809/810/811/812
Power-down reset delay vs. temperature - VOD = VTH - VCC (R/S/T)
100.00
Power-Down Reset Delay (s)
80.00
60.00
VOD = 20mV VOD = 125mV VOD = 200mV
40.00
20.00
0.00 -40
-20
0
20 Temperature (C)
40
60
80 AI07878
Figure 10. Power-up trec vs. temperature
250.00
240.00 Power-up trec (ms)
230.00
L/M R/S/T
220.00
210.00
200.00 -40
-20
0
20 Temperature (C)
40
60
80 AI07881
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STM809/810/811/812 Figure 11.
Typical operating characteristics Normalized reset threshold vs. temperature
1.003 1.002 1.001 1.000 Normalized Threshold 0.999 0.998 0.997 0.996 0.995 0.994 0.993 -40 -20 0 20 Temperature (C) AI07882 40 60 80
L/M R/S/T
Figure 12. Max transient duration NOT causing reset pulse vs. reset comparator overdrive
700.00 600.00 Maximum Transient Duration (s) 500.00 400.00
R/S/T L/M
300.00 200.00 100.00 0.00
1
10
100
1000 AI07883
Reset Comparator Overdrive, VRST - VCC (mV)
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Maximum ratings
STM809/810/811/812
4
Maximum ratings
Stressing the device above the rating listed in the absolute maximum ratings table may cause permanent damage to the device. These are stress ratings only and operation of the device at these or any other conditions above those indicated in the operating sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Refer also to the STMicroelectronics SURE Program and other relevant quality documents. Table 3.
Symbol TSTG TSLD(1) VIO VCC IO PD
Absolute maximum ratings
Parameter Storage temperature (VCC off) Lead solder temperature for 10 seconds Input or output voltage Supply voltage Output current Power dissipation Value -55 to 150 260 -0.3 to VCC +0.3 -0.3 to 7.0 20 320 Unit C C V V mA mW
1. Reflow at peak temperature of 260 C. The time above 255 C must not exceed 30 seconds.
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DC and AC parameters
5
DC and AC parameters
This section summarizes the operating measurement conditions, and the DC and AC characteristics of the device. The parameters in the DC and AC characteristics tables that follow, are derived from tests performed under the measurement conditions summarized in Table 4.. Designers should check that the operating conditions in their circuit match the operating conditions when relying on the quoted parameters. Table 4. Operating and AC measurement conditions
Parameter VCC supply voltage Ambient operating temperature (TA) Input rise and fall times Input pulse voltages Input and output timing ref. voltages STM809/810/811/812 1.0 to 5.5 -40 to 85 5 0.2 to 0.8 VCC 0.3 to 0.7 VCC Unit V C ns V V
Figure 13. AC testing input/output waveforms
0.8VCC
0.7VCC 0.3VCC AI02568
0.2VCC
Figure 14. MR timing waveform
MR tMLRL
RST
(1)
tMLMH
trec
AI07837a
1. RST for STM810/812
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DC and AC parameters Table 5.
Sym VCC ICC VIH VIL
STM809/810/811/812
DC and AC characteristics
Description Operating voltage VCC supply current MR input high voltage MR input low voltage Test condition(1) Min Typ Max 5.5 5.5 10 15 Unit V V A A V V V V V
Alternative
VOL
RST output low voltage (active high(2) or low)
VOL
RST output low voltage
1.2 TA = -40 to +85 C TA = 0 to +70 C 1.0 VCC < 3.6 V VCC < 5.5 V 2.2 VCC > VRST (max), STM8XXL/M VCC > VRST (max), STM8XXR/S/T 0.7 VCC VCC > VRST (max), STM8XXL/M VCC > VRST (max), STM8XXR/S/T STM8XXR/S/T only, IOL = 1.2 mA VCC = VRST (min) STM8XXL/M only, IOL = 3.2 mA VCC = VRST (min) IOL = 50 A; VCC > 1.0 V STM8XXR/S/T only, IOH = 500 A STM8XXL/M only, IOH = 800 A IOH = 150 A, 1.8 V < VCC < VRST (min) 25 C -40 to 85 C 25 C -40 to 85 C 25 C -40 to 85 C 25 C -40 to 85 C 25 C -40 to 85 C 0.8 VCC 0.8 VCC 0.8 VCC
5.5 7
0.8 0.25 VCC 0.3
0.4 0.3
V V V V V
RST output high voltage VOH RST output high voltage Reset thresholds
STM8XXL STM8XXM VRST Reset threshold STM8XXT STM8XXS STM8XXR VRST temperature coefficient VCC to RST delay
4.56 4.50 4.31 4.25 3.04 3.00 2.89 2.85 2.59 2.55
4.63 4.38 3.08 2.93 2.63
4.70 4.75 4.45 4.50 3.11 3.15 2.96 3.00 2.66 2.70
VCC = 3.3 V STM8XXL/M VCC = VRST to (VRST - 100 mV) STM8XXR/S/T
45 40 20
V V V V V V V V V V ppm/ C s s
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DC and AC parameters
Sym
Alternative
Description
Test condition(1)
Min
Typ
Max
Unit
Push-button reset input tMLMH tMLRL tMR tMRD MR pulse width MR to RST output delay(3) MR glitch immunity(4) MR pull-up resistance RST pulse width 10 0.5 100 20 210 s s ns k ms
trec
1. 2. 3. 4.
10 140
30 280
Valid for ambient operating temperature: TA = -40 to 85 C; VCC = 1.2 V to 5.5 V (except where noted). For active high (RST); VCC = VRST (max) RST output for STM810/812 "Glitches" of 100 ns or less typically will not generate a reset pulse.
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Package mechanical data
STM809/810/811/812
6
Package mechanical data
In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK(R) packages, depending on their level of environmental compliance. ECOPACK(R) specifications, grade definitions and product status are available at: www.st.com. ECOPACK(R) is an ST trademark. Figure 15. SOT23-3 - 3-lead small outline transistor package outline
E E1
B 0.15
M
CAB
A1
1
e e1 D
0.20
M
CAB A
3X
0.10 C C
A2 A
3X b C
L1 L
C SOT23-3
Note:
Drawing is not to scale. Table 6.
Symbol A A1 A2 b C D E E1 e e1 L L1 N 0.54 0.40 0 3 0.60 8
SOT23-3 - 3-lead small outline transistor package mechanical data
mm Typ Min 0.89 0.01 0.88 0.30 0.08 2.80 2.10 1.20 0.89 1.78 Max 1.12 0.10 1.02 0.50 0.20 3.04 2.64 1.40 1.03 2.05 0.021 0.016 0 3 0.024 8 Typ inches Min 0.035 0.001 0.035 0.012 0.003 0.110 0.083 0.047 0.035 0.070 Max 0.044 0.004 0.042 0.020 0.008 0.120 0.104 0.055 0.041 0.081
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Package mechanical data
Figure 16. SOT143-4 - 4-lead small outline transistor package outline
E E1
B 0.15
M
CAB
A1
1
e1
e/2 e D
0.15
M
CAB
b2
0.20
M
CAB A
4X
C 0.10 C
A2 A
3X b C
L1 C L
SOT143-4
Note:
Drawing is not to scale. Table 7.
Symbol A A1 A2 b b2 C D E E1 e e1 L L1 N 1.92 0.20 0.55 0.40 0 4 0.60 10
SOT143-4 - 4-lead small outline transistor package mechanical data
mm Typ Min 0.89 0.01 0.88 0.37 0.76 0.09 2.80 2.10 1.20 Max 1.12 0.10 1.02 0.51 0.94 0.18 3.04 2.64 1.40 0.076 0.008 0.022 0.016 0 4 0.024 10 Typ inches Min 0.035 0.001 0.035 0.015 0.030 0.004 0.110 0.083 0.047 Max 0.044 0.004 0.042 0.020 0.037 0.007 0.120 0.104 0.055
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Part numbering
STM809/810/811/812
7
Part numbering
Table 8.
Example:
Ordering information scheme
STM8XX L WX 6 F
Device type STM8XX
Reset threshold voltage L = VRST = 4.50 V to 4.75 V M = VRST = 4.25 V to 4.50 V T = VRST = 3.00 V to 3.15 V S = VRST = 2.85 V to 3.00 V R = VRST = 2.55 V to 2.70 V Package WX = SOT23-3 (STM809, STM810) W1 = SOT143-4 (STM811, STM812)
Temperature range 6 = -40 to 85 C
Shipping method F = ECOPACK(R) package, tape & reel
For a list of available options (e.g., speed, package) or for further information on any aspect of this device, please contact the ST sales office nearest to you.
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STM809/810/811/812 Table 9. Marking description
Reset threshold 4.63 V 4.38 V 3.08 V 2.93 V 2.63 V 4.63 V 4.38 V 3.08 V 2.93 V 2.63 V 4.63 V 4.38 V 3.08 V 2.93 V 2.63 V 4.63 V 4.38 V 3.08 V 2.93 V 2.63 V Output Push-pull RST Push-pull RST Push-pull RST Push-pull RST Push-pull RST Push-pull RST Push-pull RST Push-pull RST Push-pull RST Push-pull RST Push-pull RST Push-pull RST Push-pull RST Push-pull RST Push-pull RST Push-pull RST Push-pull RST Push-pull RST Push-pull RST Push-pull RST
Part numbering
Part number STM809L STM809M STM809T STM809S STM809R STM810L STM810M STM810T STM810S STM810R STM811L STM811M STM811T STM811S STM811R STM812L STM812M STM812T STM812S STM812R
Topside marking(1) 8AAx 8ABx 8ACx 8ADx 8AEx 8AFx 8AGx 8AHx 8AJx 8AKx 8ALx 8AMx 8ANx 8APx 8AQx 8ARx 8ASx 8ATx 8AUx 8AVx
1. x = letter assigned to indicate assembly work week (i.e., A = WW01 and WW02, B = WW03 and WW04, C = WW05 and WW06..., Z = WW51, WW52, and WW53).
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Revision history
STM809/810/811/812
8
Revision history
Table 10.
Date 02-Sep-2003 03-Oct-2003 16-Oct-2003 17-Nov-2003 04-Dec-2003 09-Dec-2003 10-Feb-2004 19-Nov-2004 05-Jan-2010
Document revision history
Revision 1 1.1 1.2 1.3 2 2.1 3 4 5 First issue Update operating characteristics (Figure 7, Figure 8, Figure 9, Figure 10, Figure 11, Figure 12) Update characteristics (Table 5); modify illustration (Figure 12) Modified with JEDEC timing symbols (Figure 14;Table 5) Reformatted; promoted; updated (Figure 14; Table 5, 6) Correct timing label, combine characteristics (Figure 10; Table 5) Clarify package; update DC characteristics (Table 5, Table 8) Update dimensions (Table 6). Updated footnote in Table 3, added text to Section 6: Package mechanical data, added footnote to Table 9. Changes
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